1. Field of the Invention
The present invention generally relates to integrated circuit packaging and in particular, to a conformable multilayered wiring structure for connecting one or more integrated circuit chips mounted thereon together or to a module substrate or a printed circuit card.
2. Description of the Related Art
Performance and signal density demands are forcing single chip modules (SCMs) and, especially, multi-chip modules (MCMs) to become more and more complex with an ever-increasing number of wiring layers. Typically, each chip, some >4 centimeters (cm) on each side, may have a grid of chip input/output (I/O) pads with a solder ball located on each, also called a ball grid array (BGA). State of the art SCMs include a single chip mounted on a relatively simple substrate that may reroute chip I/Os and expands the chip I/O pitch from the closely spaced chip pad pitch (e.g., 100 micrometer (μm or micron) square or less signal pads on 200 micron centers) to the more coarsely spaced module I/O pin spacing, e.g., 1 millimeter (mm). State of the art MCM substrates (typically ceramic) are much more complex because, in addition to fanning individual chip I/O signals out from chip pad pitch to module pad pitch, the substrate contains multiple layers of wiring for common chip I/O signals, power, ground and for inter-chip signals between MCM chips. Thus, because of the need for additional wiring, substrate complexity is directly related to the number of chips mounted on the substrate. Each wiring layer increases the substrate cost. So, typically MCMs are much more expensive than SCMs.
SCM and MCM modules are attached to printed circuit boards, which are assembled into a system. Generally, reducing collective board space reduces system size. Board size is directly related to the number and size of the board modules. Board complexity is a function of the number of each module's I/Os. The number of I/Os for each module is determined by the number of chip signals that must be passed to other units (chips, display drivers, etc.) and cannot be contained within the module substrate as inter-chip substrate wiring.
Thus for example, newer generations of microprocessors (μPs), such as the Pentium IV from Intel Corporation or the Athlon XP from AMD Corporation, each include both on-chip (level 1 or L1) and off-chip (level 2 or L2) memory caches. These L1 and L2 caches are closely integrated with the particular μPs, interfacing each with high speed local memory and provide a significant performance advantage for any routines, subroutines or instructions that can be contained within the caches. To contain μP packaging costs, typically, relatively cheap, lower density packaging (an opposed to much more expensive ceramic MCMs), is used to include cheap memory chips with a much more expensive μP. These cheaper packages usually trade performance for cost but, still realize a major performance improvement because the L2 cache memory is placed (electrically) so much closer to the μP than other system memory. As described herein above, any execution that requires the μP to access main memory, i.e., out of module or off board, incurs a notable performance hit.
So, just as with packaging closely integrated L2 caches with μps, designers attempt to minimize out of module communications by increasing module density, i.e., by increasing the number of chips on each MCM. The simplest way to increase overall module density is to push module chips closer together. However, once chips butt up against each other, they can't be pushed any closer. Also, adding chips increases wiring complexity, typically by requiring additional wiring layers. Another way density may be increased is by mounting a number of chips on cheaper multilayer interposers and attaching the interposers to the much more expensive MCM substrate. Typically, interposers have multiple wiring, power and ground layers separated by an inexpensive dielectric material, such as a resin composite material of resin epoxy and fiberglass, namely Fire Retardant-4 (FR-4), or a nonconductive organic insulator material. Usually, the chips are attached to the interposer and the interposer is attached to the substrate, adding a layer of chips above substrate mounted chips.
Thus, there exists a need for increased module density and more particularly for increasing available cache memory and decreasing the distance between microprocessors and cache memory.